1. Field of the Invention
This invention relates to a method of producing a substrate for use in a semiconductor device and a method of producing a semiconductor device using the same.
2. Related Art
In integrated circuits using insulated gate type field effect transistors (hereinafter simply referred to as Si-MOSFET) using silicon, a reduction in power consumption and an increase in operation speed have been compatibilized by diminishing the size of a device or lowering an operation voltage in accordance with the so-called scaling rule. However, since the gate length has been decreased to as short as 0.1 xcexcm or less in recent years, there are various problems such as the short-channel effect and a reduction in an operation margin due to proximity of the drain voltage and the threshold voltage. Further, referring to the mobility as an index for the increase in the operation speed, various improvements described above rather provide a contrary result of lowering the mobility of actual Si devices. As described above, a further improvement in performance has become very difficult in existing Si-MOSFETs.
Further improvement in performance requires increasing the operation speed by utilizing a field effect transistor using SOI (silicon on insulator) on the one hand and by improving the semiconductor material itself on the other hand.
Considering that the existing Si processing technology capable of high integration is widely, utilized the most practical method for solving the problem is to provide a semiconductor device having a field effect transistor with a low power consumption and high operation speed by using Si or a combination thereof with a homologous element Ge in addition to the SOI technology.
Specifically, improvement can be attained by applying strain, by means of a strain-applying semiconductor layer, to a layer in which channels of a field effect transistor are formed, thereby increasing the mobility of carriers in the channel to a value greater than that of the material in an unstrained channel forming layer. That is, when the material of the channel forming layer is Si, the lattice constant within the plane of the Si channel forming layer is increased by applying stain to a value greater than that of unstrained Si.
It is theoretically suggested that when strains are applied to Si or Ge, mobility of carriers can be increased compared with Si or Ge with no strains. This is described, for example, in the article (written by M. V. Fischetti and S. E. Laux), in Journal of Applied Physics (J. Appl. Phys.) vol. 80 (1996), p 2234.
One method of applying strain to Si comprises growing an Sixe2x80x94Ge alloy film with a sufficient thickness on an Si substrate and growing an Si thin, film further thereon has generally been used. When an Sixe2x80x94Ge alloy film with a sufficient thickness is grown, dislocation occurs in the film and, at the same time, the lattice constant within the growing plane of the Sixe2x80x94Ge alloy film increases compared with that of bulk Sixe2x80x94Ge. That is, the lattice strain of the Sixe2x80x94Ge film is relaxed. When an Si film is grown on the thus grown stress-relaxed Sixe2x80x94Ge film, the Si film undergoes biaxial tensile strain within the plane.
On the other hand, there is a second method comprising a combination of SOI technique and Sixe2x80x94Ge. That is, a method of forming an Sixe2x80x94Ge layer on an existent SOI substrate to relax strains has been attempted. This is described, for example, in Japanese Patent Laid-open No. Hei 7-169926, or in the paper (by A. R. Powell, S. S. Iyer and F. K. LeGoues), in Applied Physics Letter (Appl. Phys. Lett), vol. 64 (1994), p 1856. As the third method, a method of forming a stress relaxation Sixe2x80x94Ge layer on an Si oxide film by oxygen ion implantation separation method (SIMOX) has also been attempted. This is described, for example, in Japanese Patent Laid-open No. Hei 9-321307 or in the paper (by N. Sugiyama, T. Mizuno, S. Takagi, M. Koike and A. Kurobe), in xe2x80x9cThin Solid Filmsxe2x80x9d, vol. 369 (2000), p 299. Further, as the fourth method, Japanese Patent Laid-open No. 2000-243946 discloses a method of laminating an Sixe2x80x94Ge layer on an SOI substrate and then conducting strain relaxation while diffusing Ge by heat treatment or an oxidizing step.
An object of this invention is to provide a method of producing a substrate for use in a semiconductor device that is sufficiently planar and with less defect density, as well as a method of producing a high performance semiconductor device using the same.
According to a typical aspect of the present invention, there is provided a method of producing a substrate for use in a semiconductor device comprising the steps of forming a mixed crystal layer of silicon and germanium (hereinafter, the mixed crystal of silicon and germanium is referred to as Sixe2x80x94Ge and a mixed crystal layer of silicon and germanium as Sixe2x80x94Ge alloy layer) on a single crystal silicon layer (hereinafter, referred to as single crystal Si layer) formed on an insulating layer, melting the Sixe2x80x94Ge layer and solidifying the Sixe2x80x94Ge layer while diffusing germanium (hereinafter referred to as Ge) from the Sixe2x80x94Ge layer to the single crystal Si layer.
According to another aspect of the present invention, there is provided a method of producing a substrate for use in a semiconductor device comprising the steps of forming an Sixe2x80x94Ge layer on a single crystal Si layer formed on an insulating layer, melting the Sixe2x80x94Ge layer at a temperature higher than the solidus curve temperature determined by the Ge content of the Sixe2x80x94Ge layer and at a temperature lower than the solidus curve temperature determined by the Ge content in the mixed layer of the single crystal Si layer and the Sixe2x80x94Ge layer and solidifying the Sixe2x80x94Ge layer in accordance with the lowering of the Ge content in the Sixe2x80x94Ge layer.
Preferably, at least one of an Si layer and an insulating layer is formed on the Sixe2x80x94Ge layer and then the Sixe2x80x94Ge layer is melted.
It will be apparent that a method of producing a semiconductor device by forming at least a single crystal Si layer on the substrate formed according to the invention and forming a semiconductor device using the single crystal Si layer as a base material is useful. In this case, a step of forming an Si layer on the stress-relieved Sixe2x80x94Ge layer of a Sixe2x80x94Ge virtual substrate, a step of forming a gate insulation film and a gate electrode, a step of forming source-drain regions and a step of forming wirings are conducted, and such steps can be conducted by usual methods. Further, in actual production of a semiconductor integrated circuit device, it is preferred to define regions of a multiple-layer structure comprising the single crystal Si layer and the Sixe2x80x94Ge layer before the step of melting the Sixe2x80x94Ge layer and then conduct subsequent steps for the production of the semiconductor device.